I. Introduction
Combinational logic is used for building circuits where certain outputs are desired, given certain inputs. The construction of combinational logic is generally done using one of two methods: a sum of products, or a product of sums. A sum of products can be easily visualized by looking at a truth table
II. Objectives
- to be able to implement combinational logic circuits with concurrent code and interface their symbols with each other.
IV. Data and Results
3.1 Create a multiplexer for two 4 bits numbers
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity mnm31 is
port (S : bit;
A,B : in bit_vector (0 to 3);
X : out bit_vector(0 to 3));
end mnm31;
architecture mux_Threep1 of mnm31 is
begin
process (S)
begin
case S is
when '0' => X<= A;
when '1' => X<= B;
end case;
end process;
end mux_Threep1;
3.2 Design a Comparator for two 4 bits numbers using VHDL. If A>B, the output is 1.
library ieee;
use ieee.std_logic_1164.all;
entity mnm32 is
port (A,B : in bit_vector (3 downto 0);
O : out bit);
end entity;
architecture comp of mnm32 is
begin
process (A,B)
begin
if (A(3) = '1' AND B(3) = '0') then O <='1';
elsif (A(2) = '1' AND B(2) = '0') then O <='1';
elsif (A(1) = '1' AND B(1) = '0') then O <='1';
elsif (A(0) = '1' AND B(0) = '0') then O <='1';
else
O <= '0';
end if;
end process;
end comp;
3.3 Design comparator for two 4 bits numbers in 7-segment. The 7-segment will display the greater number
V.Analysis
The group encountered three problems in this experiment because it has a three experiments :) the first one is the Creating a multiplexer for two 4 bits numbers the second is the Designing of a Comparator for two 4 bits numbers using VHDL. If A>B, the output is 1 and lastly the Designing comparator for two 4 bits numbers in 7-segment. The 7-segment will display the greater number. We encounter different errors in syntax and in the diagram we analyze the flow of the program and the circuit to be satisfied the said requirement.
VI.Conclusion
As the group encountered it is easy to finish the problem by double checking the program and the schematic diagram you must analyze the different commands and the structure of the program and the circuit.
The group encountered three problems in this experiment because it has a three experiments :) the first one is the Creating a multiplexer for two 4 bits numbers the second is the Designing of a Comparator for two 4 bits numbers using VHDL. If A>B, the output is 1 and lastly the Designing comparator for two 4 bits numbers in 7-segment. The 7-segment will display the greater number. We encounter different errors in syntax and in the diagram we analyze the flow of the program and the circuit to be satisfied the said requirement.
VI.Conclusion
As the group encountered it is easy to finish the problem by double checking the program and the schematic diagram you must analyze the different commands and the structure of the program and the circuit.
